Computer Arithmetic Volume III is a compilation of key papers in computer arithmetic on floating-point arithmetic and design. The intent is to show progress, evolution, and novelty in the area of floating-point arithmetic. This field has made extraordinary progress since the initial software routines on mainframe computers have evolved into hardware implementations in processors spanning a wide range of performance. Nevertheless, these papers pave the way to the understanding of modern day processors design where computer arithmetic are supported by floating-point units.
The goal of Volume III is to collect the defining document for floating-point arithmetic and many of the key papers on the implementation of both binary and decimal floating-point arithmetic into a single volume. Although fewer than forty papers are included, their reference lists will direct the interested reader to other excellent work that could not be included here.
Volume III is specifically oriented to the needs of designers and users of both general-purpose computers and special-purpose digital processors. The book should also be useful to systems engineers, computer architects, and logic designers. It is also intended to serve as a primary text for a course on floating-point arithmetic, as well as a supplementary text for courses in digital arithmetic and high-speed signal processing.
○ The papers that are included cover the key concepts needed to develop efficient (fast, small and low-power) floating-point processing units
○ The papers include presentations by the initial developers in their own words to better explain the basic techniques
○ Includes five papers on decimal floating-point arithmetic, which has been added to the IEEE standard
Yale University Library